Easy-filter: A Design, Verification, and Validation Tool for Finite Impulse Response (FIR) Filter
Date
2020-12
Authors
Kumari, Anshu
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Abstract
Due to increasing hardware design complexity and cutting-edge competition for
the short time-to-market requirement, functional verification becomes the primary
challenge in the hardware design development project. The essential parts to verify any
systems are design code and testbench code. However, it is very labor-intensive to write
these codes and prone to manual errors. The idea behind this thesis is to develop a userfriendly graphical user interface (GUI) that helps Verification Engineers to generate
design and testbench code. GUI also validate these codes by comparing with MATLAB
results more efficiently and in less time. Often, it is challenging to finish the debugging in
due time because of obvious reasons such as coming across several design changes at any
time. It means that they must rewrite their design and test benches. These changes
become a significant issue if they happen right before tape out. The proposed system
automates the design implementation of the FIR filter, which engineers can easily modify
in less time. The first step is to generate the design and testbench code of the FIR filter
and simulate using Modelsim. The second step is to validate this design by comparing its
results against already existing well established MATLAB's results. Filters of some sorts
are essential to the operation of most electronic circuits. Our proposed system can save a
significant amount of time for engineers because it can generate design code, testbench
code, and validate it, all in one system. The GUI generated Verilog codes are
synthesizable. The simulation results show that GUI based FIR filter’s design is fast,
convenient, flexible, and error-free.
Description
Keywords
Verilog, Graphical User Interface, Finite Impulse Response (FIR) filter, Window function, Floating-point conversion, MATLAB, Functional verification
Citation
Kumari, A. (2020). <i>Easy-filter: A design, verification, and validation tool for Finite Impulse Response (FIR) filter</i> (Unpublished thesis). Texas State University, San Marcos, Texas.